Technologies de l'information — Systèmes à microprocesseurs — Architecture des registres de commande et d'état pour bus de micro-ordinateur

Defines the address-space maps, the bus transaction sets, and the node's CSRs. Includes the format and content of the configuration ROM on the node providing the parameters necessary to autoconfigure systems with nonprocessor nodes provided by multiple vendors. The annexes provide background for understanding the usage of this CSR Archtecture specification.